FPGAs, ASICs, and other high performance commercial applications will be targeted by next year at volume
Today, vertical NAND (v-NAND) flash memory is in production and bumping storage densities in mobile devices to new highs. Yet while many players -- including Samsung Electronics Comp., Ltd. (KSC:005930) -- are actively producing v-NAND, vertical DRAM -- stacked volatile memory -- remained unsampled until now.
I. HMC -- 70 Percent Less Power, 8x the Transfer Rate of DDR4
Micron Technologies Inc. (MU) this week announced the industry's first stacked DRAM. While Micron describes the stacked chips as a "hybrid memory cube" (HMC) (also known as vertical DRAM (v-DRAM), the structure appears more like little stacks of poster board on a circuit board.
Micron's hybrid memory cube is finally sampling. [Image Source: Micron]
Each layer features a 4 Gb (Gigabit) die, and there are four layers for a total capacity of 2 GB (Gigabytes) for the stack.
Micron is claiming to get 160 GB/s (Gigabytes per second) of bandwidth for the chip. That's an incredible data transfer rate, compared to the approximately 11 GB/s DDR3 gets and the 21-24 GB/s DDR4 is expected to get. Moreover, the packaging cuts power consumption by 70 percent by reducing the distance signals have to travel between chips.
The Boise, Idaho-based chipmaker sees potential demand for HMC chips in "data packet processing, data packet buffering or storage, and computing applications such as processor accelerators." The latter sounds like the new DRAM could be targeted at graphics processing units (GPUs), among the most memory-hungry components of a modern PC.
But HMC stock for consumer devices such as GPUs or smartphones won't be available for "three to five years", according to Micron.
II. Commercial Clients Get First Dibs on Smoking Fast HMC
In the meantime Micron plans to work its way up to volume production, selling the chips at higher prices to performance-sensitive commercial clients that are willing to pay more for the fresh technology. To those ends the chipmaker's plan is straightforward; following its 2 GB sampling Micron plans to sample 4 GB stacks in early 2014, followed by volume production of the 2 GB and 4 GB stacks in late 2014 for enterprise clients.
Micron's DRAM Solutions VP Brian Shaw boasts, "System designers are looking for new memory system designs to support increased demand for bandwidth, density, and power efficiency. HMC represents the new standard in memory performance; it's the breakthrough our customers have been waiting for."
In a press release distributed by Micron, Jim Handy, an analyst for Objective Analysis, says that it's natural for DRAM to evolve a similar 3D stacking approach to flash, despite inherent technical difficulties that have stymied top chipmakers like Samsung. He comments, "The Hybrid Memory Cube is a smart fix that breaks with the industry's past approaches and opens up new possibilities. Although DRAM internal bandwidth has been increasing exponentially, along with logic's thirst for data, current options offer limited processor-to-memory bandwidth and consume significant power. HMC is an exciting alternative."
Samsung should eventually have a HMC of its own, as it's been working with Micron to develop some of the specifications and technologies underlying the process. Both companies are part of the HMC Consortium (HMCC).
Xilinx, Inc. (XLNX), the top designer of field programmable gate array (FPGA) chips, has also been collaborating on the project and has a keen interest in becoming an early adopter of the faster, more power-efficient v-DRAM. FPGAs are key application for Micron's HMC chips to target next year, as they are very sensitive to the DRAM that's embedded inside the devices' many reprogrammable logic cells.
Micron is also winding up towards its launch of DDR4 memory, which may be made available at volume to commercial clients later this year.
Today, vertical NAND (v-NAND) flash memory is in production and bumping storage densities in mobile devices to new highs. Yet while many players -- including Samsung Electronics Comp., Ltd. (KSC:005930) -- are actively producing v-NAND, vertical DRAM -- stacked volatile memory -- remained unsampled until now.
I. HMC -- 70 Percent Less Power, 8x the Transfer Rate of DDR4
Micron Technologies Inc. (MU) this week announced the industry's first stacked DRAM. While Micron describes the stacked chips as a "hybrid memory cube" (HMC) (also known as vertical DRAM (v-DRAM), the structure appears more like little stacks of poster board on a circuit board.
Micron's hybrid memory cube is finally sampling. [Image Source: Micron]
Each layer features a 4 Gb (Gigabit) die, and there are four layers for a total capacity of 2 GB (Gigabytes) for the stack.
Micron is claiming to get 160 GB/s (Gigabytes per second) of bandwidth for the chip. That's an incredible data transfer rate, compared to the approximately 11 GB/s DDR3 gets and the 21-24 GB/s DDR4 is expected to get. Moreover, the packaging cuts power consumption by 70 percent by reducing the distance signals have to travel between chips.
The Boise, Idaho-based chipmaker sees potential demand for HMC chips in "data packet processing, data packet buffering or storage, and computing applications such as processor accelerators." The latter sounds like the new DRAM could be targeted at graphics processing units (GPUs), among the most memory-hungry components of a modern PC.
But HMC stock for consumer devices such as GPUs or smartphones won't be available for "three to five years", according to Micron.
II. Commercial Clients Get First Dibs on Smoking Fast HMC
In the meantime Micron plans to work its way up to volume production, selling the chips at higher prices to performance-sensitive commercial clients that are willing to pay more for the fresh technology. To those ends the chipmaker's plan is straightforward; following its 2 GB sampling Micron plans to sample 4 GB stacks in early 2014, followed by volume production of the 2 GB and 4 GB stacks in late 2014 for enterprise clients.
Micron's DRAM Solutions VP Brian Shaw boasts, "System designers are looking for new memory system designs to support increased demand for bandwidth, density, and power efficiency. HMC represents the new standard in memory performance; it's the breakthrough our customers have been waiting for."
In a press release distributed by Micron, Jim Handy, an analyst for Objective Analysis, says that it's natural for DRAM to evolve a similar 3D stacking approach to flash, despite inherent technical difficulties that have stymied top chipmakers like Samsung. He comments, "The Hybrid Memory Cube is a smart fix that breaks with the industry's past approaches and opens up new possibilities. Although DRAM internal bandwidth has been increasing exponentially, along with logic's thirst for data, current options offer limited processor-to-memory bandwidth and consume significant power. HMC is an exciting alternative."
Samsung should eventually have a HMC of its own, as it's been working with Micron to develop some of the specifications and technologies underlying the process. Both companies are part of the HMC Consortium (HMCC).
Xilinx, Inc. (XLNX), the top designer of field programmable gate array (FPGA) chips, has also been collaborating on the project and has a keen interest in becoming an early adopter of the faster, more power-efficient v-DRAM. FPGAs are key application for Micron's HMC chips to target next year, as they are very sensitive to the DRAM that's embedded inside the devices' many reprogrammable logic cells.
Micron is also winding up towards its launch of DDR4 memory, which may be made available at volume to commercial clients later this year.
No comments:
Post a Comment